The present invention relates to a semiconductor substrate including wafer-like plate-shaped crystal and a compound semiconductor crystal layer formed on the plate-shaped crystal, a method of manufacturing the semiconductor substrate, a semiconductor device, such as a semiconductor laser diode used as a light source for a pickup for an optical disk and the like, a light emitting diode used as a light source for a display device and the like, and a field effect transistor, and a method of manufacturing the semiconductor device.
Recently, nitride compound semiconductors such as GaN, InN and AlN are in the limelight as a material for a short wavelength light source and an environment resistant device because such semiconductors are of direct transition type and have a large energy gap. For example, GaN has an energy gap as large as approximately 3.4 eV at room temperature, and hence is a promising material for a light emitting element for emitting light in a range between the blue region and the ultraviolet region.
In forming a film of nitride compound semiconductor crystal, metal organic vapor deposition (hereinafter referred to as the MOCVD) is generally adopted. In the formation of a film of, for example, GaN crystal, trimethylgallium and ammonia are used as the materials, and Ga obtained by decomposing trimethylgallium and N obtained by decomposing ammonia are adhered onto a substrate having been heated at a high temperature. Thus, a monocrystal film of GaN can be obtained.
At present, a sapphire substrate is generally used as a substrate for filming the nitride compound semiconductor crystal.
In a sapphire substrate, however, the lattice constants in the a-axis direction and the c-axis direction are 4.76 xc3x85 and 12.99 xc3x85, respectively, while those of the GaN crystal are 3.19 xc3x85 and 5.19 xc3x85, respectively. In this manner, there is large lattice mismatch between the sapphire substrate and GaN crystal, and therefore, threading dislocations in number larger than 1xc3x971010 cmxe2x88x922 are caused during the film formation by the MOCVD from the interface between the sapphire substrate and the GaN crystal toward the inside of the GaN crystal.
Furthermore, since the sapphire substrate and the GaN crystal have different thermal expansion coefficients, the threading dislocations can be grown or cracks derived from the threading dislocations can be caused within the GaN crystal during temperature increase/decrease between room temperature and a high temperature exceeding 1000xc2x0 C. in the MOCVD.
Since the threading dislocation can work as a non-radiative recombination center or can capture a carrier, the performance improvement of a light emitting diode can be obstructed by the threading dislocation. Also, when a light emitting diode is manufactured by using GaN crystal including a large number of threading dislocations, a leakage current can flow, or emission failure or device destruction can be caused due to degradation in quantum efficiency. In particular, when the threading dislocations are caused in a light emitting portion of the semiconductor device, the device destruction can acceleratingly proceed, resulting in largely decreasing the life time of the device.
As means for decreasing the threading dislocations, a method in which a buffer layer is inserted between the sapphire substrate and the GaN crystal is widely adopted at present. In this method, since a stress caused by the lattice mismatch between the sapphire substrate and the GaN crystal can be relaxed by the buffer layer, the occurrence of the threading dislocations within the GaN crystal can be suppressed. In addition, since a stress caused due to the difference in the thermal expansion coefficient during the temperature increase/decrease can be also relaxed by the buffer layer, the growth of the threading dislocations and the occurrence of cracks within the GaN crystal can be suppressed.
Furthermore, Japanese Laid-Open Patent Publication No. 4-297023 describes that a buffer layer of a GaN layer formed between a sapphire substrate and GaN crystal can effectively suppress the threading dislocations and that a light emitting diode manufactured by using this technique can attain luminance more than ten times as large as that of a conventional light emitting diode.
The light emitting diode including the buffer layer of a GaN layer inserted between the sapphire substrate and the GaN crystal disclosed in Japanese Laid-Open Patent Publication No. 4-297023 will now be described with reference to FIG. 15.
As is shown in FIG. 15, the light emitting diode includes a buffer layer 101 of undoped GaN and a device structure 102 having a doublehetero junction structure successively stacked on a sapphire substrate 100. The device structure 102 includes an n-type GaN layer 103 working as a first cladding layer, an undoped IN0.2Ga0.8N layer 104 working as an active layer and a p-type GaN layer 105 working as a second cladding layer successively stacked. The device structure 102 is partially removed by dry etching so as to bare the inside of the n-type GaN layer 103. On the p-type GaN layer 105, a p-type electrode 106 is formed, and on the etched portion of the n-type GaN layer 103 an n-type electrode 107 is formed. The sapphire substrate 100 has a thickness of 150 xcexcm and the device structure 102 has a thickness of 50 xcexcm.
The present inventors manufactured a light emitting diode by a method described in Japanese Laid-Open Patent Publication No. 4-297023. Owing to the buffer layer 101 inserted between the sapphire substrate 100 and the device structure 102, the occurrence of the threading dislocations and cracks was suppressed in the device structure 102, but still there remained threading dislocations of approximately 1xc3x971010 cmxe2x88x922.
Thus, although the occurrence of the threading dislocations and cracks can be suppressed by the buffer layer 101 inserted between the sapphire substrate 100 and the device structure 102, the suppressing effect is still disadvantageously limited.
In view of the aforementioned problem, a first object of the invention is realizing a semiconductor substrate with low threading dislocation density and low crack density on which threading dislocation and cracks occurring within a device structure can be largely decreased, and a second object is realizing a semiconductor device in which threading dislocations and cracks occurring within a compound semiconductor crystal layer formed on plate-shaped crystal as well as within a device structure formed on the compound semiconductor crystal layer can be largely decreased.
The present inventors thought that the threading dislocations occurring in the device structure 102 could be decreased when part of a large number of threading dislocations proceeding from the interface between the sapphire substrate 100 and the buffer layer 101 toward the inside of the device structure 102 were made to proceed from the interface between the sapphire substrate 100 and the buffer layer 101 toward the inside of the sapphire substrate 100.
Therefore, they made various examinations on measures for making threading dislocations proceed from the interface between the sapphire substrate 100 and the buffer layer 101 toward the inside of the sapphire substrate 100. As a result, they found that the threading dislocations could proceed from the interface toward the inside of the sapphire substrate 100 by setting the thickness of the sapphire substrate 100 smaller than the thickness of the n-type GaN layer 103, thereby decreasing the threading dislocations proceeding from the interface toward the inside of the n-type GaN layer 103.
Also, they found that when the thus obtained sapphire substrate 100 and n-type GaN layer 103 are used as a substrate and a device structure is formed on this substrate, a semiconductor device including a smaller number of threading dislocations caused in the device structure can be realized.
The present invention was devised on the basis of the aforementioned findings, and is specifically realized as follows, and in the following description, a xe2x80x9csemiconductor substratexe2x80x9d means a wafer-like plate and a xe2x80x9csubstratexe2x80x9d means a plate on which a semiconductor chip is formed:
The semiconductor substrate of the invention comprises wafer-like plate-shaped crystal; a compound semiconductor crystal layer formed on the plate-shaped crystal and having a different lattice constant from the plate-shaped crystal; and a recess formed on a bottom surface of the plate-shaped crystal to make respective device forming areas in the plate-shaped crystal have a thickness substantially equal to or smaller than a thickness of the compound semiconductor crystal layer.
In the semiconductor substrate of this invention, the wafer-like plate-shaped crystal has the recess formed on the bottom surface thereof so as to make the respective device forming areas in the plate-shaped crystal have a thickness substantially equal to or smaller than the thickness of the compound semiconductor crystal layer. Therefore, when a device structure is formed on each device forming area of the semiconductor substrate of this invention, it is possible to obtain a semiconductor device in which the thickness of the plate-shaped crystal is substantially equal to or smaller than the thickness of the compound semiconductor crystal layer and threading dislocations caused in the compound semiconductor crystal layer are decreased.
The method of manufacturing a semiconductor substrate of this invention comprises a recess forming step of forming a recess on a bottom surface of wafer-like plate-shaped crystal; and a crystal layer forming step of forming, on the plate-shaped crystal, a compound semiconductor crystal layer having a different lattice constant from the plate-shaped crystal, wherein the recess forming step includes a step of forming the recess so as to make respective device forming areas in the plate-shaped crystal have a thickness substantially equal to or smaller than a thickness of the compound semiconductor crystal layer.
The method of manufacturing a semiconductor substrate of this invention comprises the step of forming the recess on the bottom surface of the wafer-like plate-shaped crystal so as to make the respective device forming areas in the plate-shaped crystal have a thickness substantially equal to or smaller than the thickness of the compound semiconductor crystal layer. Accordingly, when a device structure is formed on each device forming area of the semiconductor substrate manufactured by this method, it is possible to obtain a semiconductor device in which the thickness of the plate-shaped crystal is substantially equal to or smaller than the thickness of the compound semiconductor crystal layer and threading dislocations caused in the compound semiconductor crystal layer are decreased.
The method of manufacturing a semiconductor substrate of this invention preferably further comprises, after the crystal layer forming step, a plate-shaped crystal removing step of removing the plate-shaped crystal.
In this manner, a semiconductor substrate including no plate-shaped crystal can be obtained. Therefore, there does not arise a problem derived from the difference in the lattice constant and the thermal expansion coefficient between the plate-shaped crystal and a device structure formed on the compound semiconductor crystal layer, resulting in remarkably improving the crystallinity of the device structure formed on the compound semiconductor crystal layer.
The first semiconductor device of the invention comprises a substrate including plate-shaped crystal and a compound semiconductor crystal layer formed on the plate-shaped crystal and having a different lattice constant from the plate-shaped crystal; a device structure formed on the substrate; and a recess formed on the bottom surface of the plate-shaped crystal to make a thickness at a center of the plate-shaped crystal substantially equal to or smaller than a thickness of the compound semiconductor crystal layer.
In the first semiconductor device, since the thickness at the center of the plate-shaped crystal is substantially the same as or smaller than the thickness of the compound semiconductor crystal layer, strain derived from the difference in the lattice constant and the thermal expansion coefficient between the plate-shaped crystal and the compound semiconductor crystal layer is shared with the plate-shaped crystal. Therefore, threading dislocations occur also within the plate-shaped crystal.
In the first semiconductor device, the strain derived from the difference in the lattice constant and the thermal expansion coefficient between the plate-shaped crystal and the compound semiconductor crystal layer is shared with the plate-shaped crystal and the threading dislocations occur within the plate-shaped crystal. Accordingly, the strain derived from the difference in the lattice constant and the thermal expansion coefficient can be relaxed within the compound semiconductor crystal layer, resulting in decreasing the threading dislocations caused within the compound semiconductor crystal layer. As a result, the crystallinity of the compound semiconductor crystal layer, and furthermore, the crystallinity of a device structure formed on the compound semiconductor crystal layer. Thus, the characteristic and life time of a functional device including the device structure can be improved.
Furthermore, in the first semiconductor device, since the recess is formed on the bottom surface of the plate-shaped crystal so as to make the thickness at the center of the plate-shaped crystal substantially equal to or smaller than the thickness of the compound semiconductor crystal layer, the thickness in the periphery of the substrate can be substantially the same as that of a conventional semiconductor device. Therefore, the strength of the semiconductor device can be retained while improving the crystallinity of the compound semiconductor crystal layer.
When the first semiconductor device further comprises an electrode for voltage application formed above the device structure, a bottom of the recess is preferably larger than the electrode.
In this manner, the crystallinity of the compound semiconductor crystal layer, and furthermore, the crystallinity of a voltage applied portion of the device structure formed on the compound semiconductor crystal layer can be improved. As a result, the characteristic and life time of a functional device such as a light emitting element including the device structure can be definitely improved.
In the first semiconductor device, the plate-shaped crystal preferably includes a plate-like base portion of a crystal layer and a frame portion formed in a periphery of a bottom face of the base portion out of a material having etch selectivity against the base portion.
In this case, the recess can be definitely formed on the bottom surface of the plate-shaped crystal by forming the plate-like base portion of the crystal layer on a plate-like body and selectively etching the center of the bottom of the plate-like body.
In the first semiconductor device, the plate-shaped crystal preferably includes a plate-like base portion of a crystal layer and a side portion formed in a side part of a bottom face of the base portion out of a material having etch selectivity against the base portion.
In this case, the recess can be definitely formed on the bottom surface of the plate-shaped crystal by forming the plate-like base portion of the crystal layer on a plate-like body and selectively etching the center of the bottom of the plate-like body.
The second semiconductor device of this invention comprises a substrate including plate-shaped crystal and a compound semiconductor crystal layer formed on the plate-shaped crystal and having a different lattice constant from the plate-shaped crystal; and a device structure formed on the substrate, wherein a thickness of the plate-shaped crystal is substantially equal to or smaller than a thickness of the compound semiconductor crystal layer.
In the second semiconductor device, since the thickness of the plate-shaped crystal is substantially the same as or smaller than the thickness of the compound semiconductor crystal layer, the strain derived from the difference in the lattice constant and the thermal expansion coefficient between the plate-shaped crystal and the compound semiconductor crystal layer is shared with the plate-shaped crystal. Therefore, threading dislocations occur also within the plate-shaped crystal. Accordingly, the strain derived from the difference in the lattice constant and the thermal expansion can be relaxed within the compound semiconductor crystal layer, resulting in decreasing the threading dislocations caused within the compound semiconductor crystal layer. As a result, the crystallinity of the compound semiconductor crystal layer, and furthermore, the crystallinity of a device structure formed on the compound semiconductor crystal layer can be improved. Thus, the characteristic and life time of a functional device including the device structure can be improved.
In the second semiconductor device, the plate-shaped crystal preferably includes a plate-like body and a crystal layer formed on the plate-like body out of a different material from the plate-like body.
In the first or second semiconductor device, the compound semiconductor crystal layer is preferably made of a nitride compound represented by AlxGayIn1xe2x88x92xxe2x88x92yN, wherein 0xe2x89xa6Xxe2x89xa61and 0 xe2x89xa6yxe2x89xa61.
The first method, of this invention, of manufacturing a semiconductor device, including a substrate having plate-shaped crystal and a compound semiconductor crystal layer formed on the plate-shaped crystal and having a different lattice constant from the plate-shaped crystal, and a device structure formed on the substrate, comprises a recess forming step of forming a recess on a bottom surface of each device forming area in wafer-like plate-shaped crystal to make a thickness at a center of the device forming area substantially equal to or smaller than a thickness of the compound semiconductor crystal layer to be formed on the plate-shaped crystal; a crystal layer forming step of forming a semiconductor substrate including the plate-shaped crystal and the compound semiconductor crystal layer by forming the compound semiconductor crystal layer on the plate-shaped crystal; a device structure forming step of forming the device structure on each device forming area of the semiconductor substrate; and a cutting step of forming the semiconductor device by cutting the semiconductor substrate.
In the first method of manufacturing a semiconductor device, after the recess is formed on the bottom surface of each device forming area of the plate-shaped crystal so as to make the thickness at the center of each device forming area substantially equal to or smaller than the thickness of the compound semiconductor crystal layer to be formed on the plate-shaped crystal, the compound semiconductor crystal layer is formed on the plate-shaped crystal. Therefore, the first semiconductor device, which includes the recess formed on the bottom surface of the plate-shaped crystal so as to make the thickness at the center of the plate-shaped crystal substantially the same as or smaller than the thickness of the compound semiconductor crystal layer and has improved crystallinity, can be definitely manufactured by this method.
In the first method of manufacturing a semiconductor device, the recess forming step preferably includes a step of forming, on a plate-like body, a plate-like base portion of a crystal layer having etch selectivity against the plate-like body; and a step of forming a frame portion out of the plate-like body on a bottom face of the base portion by conducting selective etching on the plate-like body with a periphery of the plate-like body remaining.
In this case, since the periphery of the plate-like body can remain through the etching on the plate-like body having the etch selectivity against the base portion, the frame portion can be definitely formed out of the plate-like body on the bottom face of the base portion.
In the first method of manufacturing a semiconductor device, the recess forming step preferably includes a step of forming, on a plate-like body, a plate-like base portion of a crystal layer having etch selectivity against the plate-like body; and a step of forming a side portion out of the plate-like body on a bottom face of the base portion by conducting selective etching on the plate-like body with a side part of the plate-like body remaining.
In this case, since the side part of the plate-like body can remain through the etching on the plate-like body having the etch selectivity against the base portion, the side portion can be definitely formed out of the plate-like body on the bottom face of the base portion.
The first method of manufacturing a semiconductor device preferably further comprises, between the crystal layer forming step and the device structure forming step, a heat treatment step of moving threading dislocations caused within the compound semiconductor crystal layer to the plate-shaped crystal by conducting a heat treatment on the compound semiconductor crystal layer.
In this case, the threading dislocations caused within the compound semiconductor crystal layer can be moved to the plate-shaped crystal, and hence, the threading dislocations caused within the compound semiconductor crystal layer can be further decreased. As a result, the crystallinity of the compound semiconductor crystal layer can be further improved.
The second method, of this invention, of manufacturing a semiconductor device including a substrate having plate-shaped crystal and a compound semiconductor crystal layer formed on the plate-shaped crystal and having a different lattice constant from the plate-shaped crystal, and a device structure formed on the substrate, comprises a recess forming step of forming a recess on a bottom surface of wafer-like plate-shaped crystal to make respective device forming areas in the plate-shaped crystal have a thickness substantially equal to or smaller than a thickness of the compound semiconductor crystal layer to be formed on the plate-shaped crystal; a crystal layer forming step of forming a semiconductor substrate including the plate-shaped crystal and the compound semiconductor crystal layer by forming the compound semiconductor crystal layer on the plate-shaped crystal; a device structure forming step of forming the device structure on each device forming area of the semiconductor substrate; and a cutting step of forming the semiconductor device by cutting the semiconductor substrate.
In the second method of manufacturing a semiconductor device, after the recess is formed on the bottom surface of the plate-shaped crystal so as to make the thickness of each device forming area in the plate-shaped crystal substantially the same as or smaller than the thickness of the compound semiconductor crystal layer to be formed on the plate-shaped crystal, the compound semiconductor crystal layer is formed on the plate-shaped crystal. Therefore, it is possible to obtain, by this method, the second semiconductor device in which the thickness of the plate-shaped crystal is substantially the same as or smaller than the thickness of the compound semiconductor crystal layer and the crystallinity of the compound semiconductor crystal layer is improved.
The second method of manufacturing a semiconductor device preferably further comprises, between the crystal layer forming step and the device structure forming step, a heat treatment step of moving threading dislocations caused in the compound semiconductor crystal layer to the plate-shaped crystal by conducting a heat treatment on the compound semiconductor crystal layer.
In this case, since the threading dislocations caused within the compound semiconductor crystal layer can be moved to the plate-shaped crystal, the threading dislocations caused within the compound semiconductor crystal layer can be further decreased. As a result, the crystallinity of the compound semiconductor crystal layer can be further improved.